Styjun

Notepad++ - How to find multiple values on the same line in any permutation

What to say to a student who has failed?

What is this symbol: semicircles facing eachother

How much code would a codegolf golf if a codegolf could golf code?

Defense against attacks using dictionaries

I got kicked out from graduate school in the past. How do I include this on my CV?

Are there account age or level requirements for obtaining special research?

Is using a hyperlink to close a modal a poor design decision?

Using `With[...]` with a list specification as a variable

How would one country purchase another?

Why were movies shot on film shot at 24 frames per second?

Why do all fields in a QFT transform like *irreducible* representations of some group?

How should I face my manager if I make a mistake because a senior coworker explained something incorrectly to me?

Is my soulless catatonic body a valid target for the Imprisonment spell?

Dealing with an extrovert co-worker

Sun setting in East!

Does travel insurance for short flight delays exist?

Why don't electrons take the shorter path in coils?

Why can't an Airbus A330 dump fuel in an emergency?

What is wrong about this application of Kirchhoffs Current Law?

Does norwegian.no airline overbook flights?

Is "The life is beautiful" incorrect or just very non-idiomatic?

How to draw a cube that can be inscribed within a right circular cone?

What are some interesting features that are common cross-linguistically but don't exist in English?

I need to start VHDL code at button press

Vhdl with no clkVHDL - why do we need to declare signals for processes?Cyclone II Board VHDL Clock DividerHow expensive is data type conversion vs. bit array manipulation in VHDL?Why won't my VHDL run properly on my FPGA?Simple oscillator in VHDLVHDL syntax to output a signal valuedrive one output with two inputs vhdlVHDL counter skipping numbers (FPGA button trigger)My VHDL flag needs to terminate

.everyoneloves__top-leaderboard:empty,.everyoneloves__mid-leaderboard:empty,.everyoneloves__bot-mid-leaderboard:empty margin-bottom:0;

0

I have a FPGA that I am coding with VHDL. I want the system to start at a known state until all opamps are powered. My attempt is to set a value when a button is pressed. When this value is received, the code continues. I think that when flag is defined, that initial value "1000" is ignored and the FPGA most likely starts at all zeros . On a key press, a new value for "flag" is set. I would then expect the test LED to blink. I tried this and nothing happens. If I replace

if (flag = "10011") then

with

if (KEY_N(0) = '1') then

it works.

What am I missing in the code as shown below?

I also put the "if" pair inside the clocked section with no success.

signal flag : std_logic_vector(4 downto 0):= "10000"; 

DATA: process(CLK, KEY_N(0)) -- 
 begin

 if KEY_N(0) = '1' then 
 flag <= "10011";
 end if;

 if KEY_N(0) = '0' then 
 flag <= "00100";
 end if;
 if (rising_edge(CLK)) then 
 clk_cntr <= clk_cntr + 1; 

 if (flag = "10011") then
 OTHER_CNTR <= OTHER_CNTR + 1;
 END IF;

 END IF;

 END PROCESS;

 GPIO_LEDTEST(2) <= OTHER_CNTR(22); --LED SHOULD BLINK

vhdl fpga

share|improve this question

edited Apr 5 at 9:01

bsheps

61244 silver badges1919 bronze badges

asked Mar 27 at 16:47

Tyler314Tyler314

1055 bronze badges

add a comment | 

0

I have a FPGA that I am coding with VHDL. I want the system to start at a known state until all opamps are powered. My attempt is to set a value when a button is pressed. When this value is received, the code continues. I think that when flag is defined, that initial value "1000" is ignored and the FPGA most likely starts at all zeros . On a key press, a new value for "flag" is set. I would then expect the test LED to blink. I tried this and nothing happens. If I replace

if (flag = "10011") then

with

if (KEY_N(0) = '1') then

it works.

What am I missing in the code as shown below?

I also put the "if" pair inside the clocked section with no success.

signal flag : std_logic_vector(4 downto 0):= "10000"; 

DATA: process(CLK, KEY_N(0)) -- 
 begin

 if KEY_N(0) = '1' then 
 flag <= "10011";
 end if;

 if KEY_N(0) = '0' then 
 flag <= "00100";
 end if;
 if (rising_edge(CLK)) then 
 clk_cntr <= clk_cntr + 1; 

 if (flag = "10011") then
 OTHER_CNTR <= OTHER_CNTR + 1;
 END IF;

 END IF;

 END PROCESS;

 GPIO_LEDTEST(2) <= OTHER_CNTR(22); --LED SHOULD BLINK

vhdl fpga

share|improve this question

edited Apr 5 at 9:01

bsheps

61244 silver badges1919 bronze badges

asked Mar 27 at 16:47

Tyler314Tyler314

1055 bronze badges

add a comment | 

I have a FPGA that I am coding with VHDL. I want the system to start at a known state until all opamps are powered. My attempt is to set a value when a button is pressed. When this value is received, the code continues. I think that when flag is defined, that initial value "1000" is ignored and the FPGA most likely starts at all zeros . On a key press, a new value for "flag" is set. I would then expect the test LED to blink. I tried this and nothing happens. If I replace

if (flag = "10011") then

with

if (KEY_N(0) = '1') then

it works.

What am I missing in the code as shown below?

I also put the "if" pair inside the clocked section with no success.

signal flag : std_logic_vector(4 downto 0):= "10000"; 

DATA: process(CLK, KEY_N(0)) -- 
 begin

 if KEY_N(0) = '1' then 
 flag <= "10011";
 end if;

 if KEY_N(0) = '0' then 
 flag <= "00100";
 end if;
 if (rising_edge(CLK)) then 
 clk_cntr <= clk_cntr + 1; 

 if (flag = "10011") then
 OTHER_CNTR <= OTHER_CNTR + 1;
 END IF;

 END IF;

 END PROCESS;

 GPIO_LEDTEST(2) <= OTHER_CNTR(22); --LED SHOULD BLINK

vhdl fpga

share|improve this question

edited Apr 5 at 9:01

bsheps

61244 silver badges1919 bronze badges

asked Mar 27 at 16:47

Tyler314Tyler314

1055 bronze badges

if (flag = "10011") then

if (KEY_N(0) = '1') then

signal flag : std_logic_vector(4 downto 0):= "10000"; 

DATA: process(CLK, KEY_N(0)) -- 
 begin

 if KEY_N(0) = '1' then 
 flag <= "10011";
 end if;

 if KEY_N(0) = '0' then 
 flag <= "00100";
 end if;
 if (rising_edge(CLK)) then 
 clk_cntr <= clk_cntr + 1; 

 if (flag = "10011") then
 OTHER_CNTR <= OTHER_CNTR + 1;
 END IF;

 END IF;

 END PROCESS;

 GPIO_LEDTEST(2) <= OTHER_CNTR(22); --LED SHOULD BLINK

share|improve this question

edited Apr 5 at 9:01

bsheps

61244 silver badges1919 bronze badges

asked Mar 27 at 16:47

Tyler314Tyler314

1055 bronze badges

share|improve this question

edited Apr 5 at 9:01

bsheps

61244 silver badges1919 bronze badges

asked Mar 27 at 16:47

Tyler314Tyler314

1055 bronze badges

edited Apr 5 at 9:01

bsheps

61244 silver badges1919 bronze badges

edited Apr 5 at 9:01

bsheps

61244 silver badges1919 bronze badges

asked Mar 27 at 16:47

Tyler314Tyler314

1055 bronze badges

asked Mar 27 at 16:47

Tyler314Tyler314

1055 bronze badges