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How to encode the operands for a sub immediate 83 /5 opcode, like sub edx, 0x3a?
How might I convert Intel 80386 Machine Code to Assembly Language?How to use MOV instruction in ARM with an immediate number as the second operandHow do I achieve the theoretical maximum of 4 FLOPs per cycle?mov instructions with byte destination for immediate to memoryWhy does GCC generate 15-20% faster code if I optimize for size instead of speed?How to interpret x86 opcode map?assembly - opcodes vs. nasm instructionsIs the PADDD instruction actually supported by MMX, even though it's missing from Intel's manual?rbp not allowed as SIB base?Segment Base for moffs16/32
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I'm having trouble looking at assembly instructions such as this in GAS syntax
subl $0x3a, %edx
and then being able to use the Intel manual to manually produce the matching machine code which happens to be
83EA3A
I realize i go in the intel manual to the subtract page and seeing that we are subtracting an immediate from a register which would start us off with opcode 83/5 ib according to the intel manual but im a little lost where to go from here.
assembly x86 intel opcode machine-code
edited Mar 23 at 6:42
Peter Cordes
138k19211354
asked Mar 23 at 4:10
littlemimuslittlemimus
162
add a comment |
I'm having trouble looking at assembly instructions such as this in GAS syntax
subl $0x3a, %edx
and then being able to use the Intel manual to manually produce the matching machine code which happens to be
83EA3A
I realize i go in the intel manual to the subtract page and seeing that we are subtracting an immediate from a register which would start us off with opcode 83/5 ib according to the intel manual but im a little lost where to go from here.
assembly x86 intel opcode machine-code
edited Mar 23 at 6:42
Peter Cordes
138k19211354
asked Mar 23 at 4:10
littlemimuslittlemimus
162
Yes, since the immediate fits in a sign-extended imm8,83 /5is the best choice. The register operand is encoded in the rm field of a ModRM byte, as documented in the "Instruction Operand Encoding" table for that instruction, felixcloutier.com/x86/sub
– Peter Cordes
Mar 23 at 5:00
add a comment |
I'm having trouble looking at assembly instructions such as this in GAS syntax
subl $0x3a, %edx
and then being able to use the Intel manual to manually produce the matching machine code which happens to be
83EA3A
I realize i go in the intel manual to the subtract page and seeing that we are subtracting an immediate from a register which would start us off with opcode 83/5 ib according to the intel manual but im a little lost where to go from here.
assembly x86 intel opcode machine-code
edited Mar 23 at 6:42
Peter Cordes
138k19211354
asked Mar 23 at 4:10
littlemimuslittlemimus
162
I'm having trouble looking at assembly instructions such as this in GAS syntax
subl $0x3a, %edx
and then being able to use the Intel manual to manually produce the matching machine code which happens to be
83EA3A
I realize i go in the intel manual to the subtract page and seeing that we are subtracting an immediate from a register which would start us off with opcode 83/5 ib according to the intel manual but im a little lost where to go from here.
assembly x86 intel opcode machine-code
assembly x86 intel opcode machine-code
edited Mar 23 at 6:42
Peter Cordes
138k19211354
asked Mar 23 at 4:10
littlemimuslittlemimus
162
edited Mar 23 at 6:42
Peter Cordes
138k19211354
asked Mar 23 at 4:10
littlemimuslittlemimus
162
edited Mar 23 at 6:42
Peter Cordes
138k19211354
edited Mar 23 at 6:42
Peter Cordes
138k19211354
edited Mar 23 at 6:42
Peter Cordes
138k19211354
138k19211354
asked Mar 23 at 4:10
littlemimuslittlemimus
162
asked Mar 23 at 4:10
littlemimuslittlemimus
162
asked Mar 23 at 4:10
littlemimuslittlemimus
162
162
Yes, since the immediate fits in a sign-extended imm8,83 /5is the best choice. The register operand is encoded in the rm field of a ModRM byte, as documented in the "Instruction Operand Encoding" table for that instruction, felixcloutier.com/x86/sub
– Peter Cordes
Mar 23 at 5:00
add a comment |
Yes, since the immediate fits in a sign-extended imm8,83 /5is the best choice. The register operand is encoded in the rm field of a ModRM byte, as documented in the "Instruction Operand Encoding" table for that instruction, felixcloutier.com/x86/sub
– Peter Cordes
Mar 23 at 5:00
Yes, since the immediate fits in a sign-extended imm8,
83 /5 is the best choice. The register operand is encoded in the rm field of a ModRM byte, as documented in the "Instruction Operand Encoding" table for that instruction, felixcloutier.com/x86/sub– Peter Cordes
Mar 23 at 5:00
Yes, since the immediate fits in a sign-extended imm8,
83 /5 is the best choice. The register operand is encoded in the rm field of a ModRM byte, as documented in the "Instruction Operand Encoding" table for that instruction, felixcloutier.com/x86/sub– Peter Cordes
Mar 23 at 5:00
add a comment |
1 Answer
1
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oldest
votes
The opcode (8316) is followed by the ModR/M byte.
/5 (or /1012) is the Reg/Opcode field of the byte.
The Mod (112) and R/M (0102) fields specify the register (edx).
Hence: 11.101.0102 = EA16.
See:
- 2.1 INSTRUCTION FORMAT FOR PROTECTED MODE, REAL-ADDRESS MODE, AND VIRTUAL-8086 MODE of volume 2 of Intel® 64 and IA-32 Architectures Software Developer’s Manual
- In particular, Table 2-2. 32-Bit Addressing Forms with the ModR/M Byte
answered Mar 23 at 4:59
Alexey FrunzeAlexey Frunze
53.1k954132
add a comment |
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1 Answer
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The opcode (8316) is followed by the ModR/M byte.
/5 (or /1012) is the Reg/Opcode field of the byte.
The Mod (112) and R/M (0102) fields specify the register (edx).
Hence: 11.101.0102 = EA16.
See:
- 2.1 INSTRUCTION FORMAT FOR PROTECTED MODE, REAL-ADDRESS MODE, AND VIRTUAL-8086 MODE of volume 2 of Intel® 64 and IA-32 Architectures Software Developer’s Manual
- In particular, Table 2-2. 32-Bit Addressing Forms with the ModR/M Byte
answered Mar 23 at 4:59
Alexey FrunzeAlexey Frunze
53.1k954132
add a comment |
The opcode (8316) is followed by the ModR/M byte.
/5 (or /1012) is the Reg/Opcode field of the byte.
The Mod (112) and R/M (0102) fields specify the register (edx).
Hence: 11.101.0102 = EA16.
See:
- 2.1 INSTRUCTION FORMAT FOR PROTECTED MODE, REAL-ADDRESS MODE, AND VIRTUAL-8086 MODE of volume 2 of Intel® 64 and IA-32 Architectures Software Developer’s Manual
- In particular, Table 2-2. 32-Bit Addressing Forms with the ModR/M Byte
answered Mar 23 at 4:59
Alexey FrunzeAlexey Frunze
53.1k954132
add a comment |
The opcode (8316) is followed by the ModR/M byte.
/5 (or /1012) is the Reg/Opcode field of the byte.
The Mod (112) and R/M (0102) fields specify the register (edx).
Hence: 11.101.0102 = EA16.
See:
- 2.1 INSTRUCTION FORMAT FOR PROTECTED MODE, REAL-ADDRESS MODE, AND VIRTUAL-8086 MODE of volume 2 of Intel® 64 and IA-32 Architectures Software Developer’s Manual
- In particular, Table 2-2. 32-Bit Addressing Forms with the ModR/M Byte
answered Mar 23 at 4:59
Alexey FrunzeAlexey Frunze
53.1k954132
The opcode (8316) is followed by the ModR/M byte.
/5 (or /1012) is the Reg/Opcode field of the byte.
The Mod (112) and R/M (0102) fields specify the register (edx).
Hence: 11.101.0102 = EA16.
See:
- 2.1 INSTRUCTION FORMAT FOR PROTECTED MODE, REAL-ADDRESS MODE, AND VIRTUAL-8086 MODE of volume 2 of Intel® 64 and IA-32 Architectures Software Developer’s Manual
- In particular, Table 2-2. 32-Bit Addressing Forms with the ModR/M Byte
answered Mar 23 at 4:59
Alexey FrunzeAlexey Frunze
53.1k954132
answered Mar 23 at 4:59
Alexey FrunzeAlexey Frunze
53.1k954132
answered Mar 23 at 4:59
Alexey FrunzeAlexey Frunze
53.1k954132
answered Mar 23 at 4:59
Alexey FrunzeAlexey Frunze
53.1k954132
53.1k954132
add a comment |
add a comment |
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Yes, since the immediate fits in a sign-extended imm8,
83 /5is the best choice. The register operand is encoded in the rm field of a ModRM byte, as documented in the "Instruction Operand Encoding" table for that instruction, felixcloutier.com/x86/sub– Peter Cordes
Mar 23 at 5:00